Beschreibung:
<jats:p> Dislocation sidewall gettering (DSG) is an important method for the removal of device-compromising defects from optoelectronic devices such as detectors and light-emitting diodes. DSG involves the patterned epitaxy or post-growth patterning and annealing, and allows misfit dislocations to elongate until they are captured by image forces at sidewalls. Despite this physical understanding of the process, practical application of DSG has often been guided by empirical studies due to the scarcity of modeling studies. In this work we apply a detailed model for lattice relaxation and dislocation dynamics to DSG in heteroepitaxial ZnSSe/GaAs (001), considering the effects of thickness, composition, growth temperature, and annealing, and we compare modeling and experimental results for this material system. </jats:p>